Micrel, Inc.
MIC3385
May 2010
10
M9999-051310-B
Functional Description
VIN
VIN provides power to the MOSFETs for the switch
mode regulator section, along with the current limiting
sensing. Due to the high switching speeds, a 1礔
capacitor is recommended to ground (GND) pin for
bypassing. Please refer to layout recommendations.
AVIN
Analog V
IN
(AVIN) provides power to the LDO
subsection and the bias through an internal 6& resistor.
AVIN and VIN must be tied together. Careful layout
should be considered to ensure that high frequency
switching noise caused by VIN is reduced before
reaching AVIN.
LDO
The LDO pin is the output of the linear regulator and
should be connected to the output. In LOWQ mode
(LOWQ < 1.5V), the LDO provides the output voltage. In
PWM mode (LOWQ > 1.5V) the LDO pin is high
impedance.
EN
The enable pin provides a logic level control of the
output. In the off state, supply current of the device is
greatly reduced (typically <1礎). Also, in the off state,
the output drive is placed in a "tri-stated" condition,
where both the high side P-channel MOSFET and the
low-side N-channel are in an off or non-conducting
state. Do not drive the enable pin above the supply
voltage.
LOWQ
The LOWQ pin provides a logic level control between
the internal PWM mode and the low noise linear
regulator mode. With LOWQ pulled low (<0.5V),
quiescent current of the device is greatly reduced by
switching to a low noise linear regulator mode that has a
typical I
Q
of 18礎. In linear (LDO) mode the output can
deliver 60mA of current to the output. By placing LOWQ
high (>1.5V), this transitions the device into a constant
frequency PWM buck regulator mode. This allows the
device the ability to efficiently deliver up to 600mA of
output current at the same output voltage.
BIAS
The BIAS pin supplies the power to the internal power to
the control and reference circuitry. The bias is powered
from input voltage through an RC lowpass filter. The RC
lowpass filter frequency is:
e
( ) ( )
100nF
20
2
1
?/DIV>
?/DIV>
FB
The feedback pin (FB) provides the control path to
control the output. For adjustable versions, a resistor
divider connecting the feedback to the output is used to
adjust the desired output voltage. The output voltage is
calculated as follows:
V
OUT
=V
REF
?/DIV>
R1
R2
+1
?
? ?/DIV>
where V
REF
is equal to 1.0V.
A feedforward capacitor is recommended for most
designs using the adjustable output voltage option. To
reduce battery current draw, a 100K feedback resistor is
recommended from the output to the FB pin (R1). Also, a
feedforward capacitor should be connected between the
output and feedback (across R1). The large resistor
value and the parasitic capacitance of the FB pin can
cause a high frequency pole that can reduce the overall
system phase margin. By placing a feedforward
capacitor, these effects can be significantly reduced.
Feedforward capacitance (C
FF
) can be calculated as
follows:
160kHz
R1
2
1
C
FF
?/DIV>
?/DIV>
=
?/DIV>
For fixed options a feedforward capacitor from the output
to the FB pin is required. Typically a 100pF small
ceramic capacitor is recommended
SW
The switch (SW) pin connects directly to the inductor
and provides the switching current necessary to operate
in PWM mode. Due to the high speed switching on this
pin, the switch node should be routed away from
sensitive nodes.
GND
Combines PGND and SGND
Power ground (PGND) is the ground path for the high
current PWM mode. Signal ground (SGND) is the
ground path for the biasing and control circuitry.
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